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iDR-4. iDR-8. System latency

This document is designed to calculate approximate latency times for use when using various iDR system configurations.

Latency figures are not accurate to the nearest sample.

Cable distance delays are negligible.

  • ADC (at the mic input stage) = 0.85 mS
  • DSP (at the CPU stage) = 0.80 mS
  • DAC (at the output stage) = 0.60 mS
  • Digital Buss (8 audio channels) = 0.06 mS

(The DSP latency is largely due to performance-enhancing look-ahead delays in the output limiters and compressors.)

 

Single box

mceclip0.png

The latencies between each processing block are negligible, therefore we only need to add the latency times of each block.

 

Single box with input & output expanders

mceclip1.png

Here, a common source (the red line) has been split at the DSP stage and sent out via the iDR-out expander (dashed red line). The latency difference between the two is 0.06 mS (the Digital Buss stage).

 

Multiple iDR units with expanders

mceclip2.png

As more units are added, plot the path of audio through the system and add the latencies each time the audio passes through an ADC, DSP, Digital Buss or DAC processing stage.

This can be used to calculate the overall latency in the system or the latency difference at the output stage between linked units.

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